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Job Description
Explore converter architectures and the integration of analog and digital subsystems in mixed-signal designs.
Responsibilities
• Simulate ADC/DAC models using Verilog-AMS or MATLAB.
• Conduct behavioral and transistor-level verification.
• Study parasitic effects and signal integrity issues.
• Prepare performance summaries and design documentation.
Requirements
Knowledge of analog and digital circuit principles.
Experience with Cadence Spectre or MATLAB simulation.
Interest in data converter and mixed-signal design.
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